Finite Model Generation, Proof-Producing SAT Solvers, and SMT
- 👤 Speaker: Tjark Weber (University of Cambridge)
- 📅 Date & Time: Tuesday 03 February 2009, 13:00 - 14:00
- 📍 Venue: Computer Laboratory, William Gates Building, Room SS03
Abstract
This talk consists of three parts. First, I will present a finite model generator for higher-order logic. The input formula is translated to propositional logic, so that a standard SAT solver can be employed for the actual model search. The model generator supports many of the definitional mechanisms available in the Isabelle/HOL theorem prover, and has been applied to various case studies.
Second, I will present an integration of proof-producing SAT solvers with higher-order logic theorem provers. An adequate representation of the SAT problem allows to verify unsatisfiability proofs with millions of resolutions steps.
Last, I will give a brief introduction to Satisfiability Modulo Theories (SMT), the decision problem for first-order formulae with respect to combinations of background theories.
Series This talk is part of the Computer Laboratory Automated Reasoning Group Lunches series.
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Tuesday 03 February 2009, 13:00-14:00