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Low Power Photonic Networks for Shared Memory Computers

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If you have a question about this talk, please contact Prof Simon Moore .

I will start with a practice run of my presentation for the Optical Fiber Communications (OFC 2011) Conference, investigating the conditions under which adding a photonic circuit switched network to an on-chip or chip-to-chip network can reduce power consumption.  This is based on analysis of memory traces from a 32-core shared memory system running the PARSEC benchmark suite.  I will also discuss recent work on building SystemVerilog models of photonic switches and time-slotted network control circuits, demonstrating an order of magnitude reduction in power consumption compared with an electronic mesh network.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

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