Controller Design of a Grid-tie Inverter to Enhance Fault-Ride-Through Capability
- đ¤ Speaker: Yoshito Ohta, Kyoto University
- đ Date & Time: Tuesday 26 August 2014, 14:00 - 15:00
- đ Venue: Cambridge University Engineering Department, LR5
Abstract
The use of photovoltaic (PV) and wind power generation is growing. With the increase of distributed generators, inverters are subject to stricter rules for connection and/or disconnection. The rules include fault-ride-through (FRT) capability: inverters are required to keep operating even if the voltage or frequency of the grid changes in a short period of time. This talk proposes a novel approach for the controller design of a three-phase grid-tie inverter to enhance FRT capability. First, we analyze the input-output map of the system consisting of the cascade connection of a diagonal transfer function pre- and post-multiplied by DQ (direct-quadrature) and inverse DQ transformations which are prevalently used as a controller for systems with a rotating axis. We show that when the angular velocity is constant the map is time-invariant. Second, we analyze the effects of positive and negative phase sequence disturbances, and shows that the conventional method has poor ability to reject negative phase sequence disturbances. Finally, we apply the analysis to the controller design for a gridtie inverter bypassing DQ transformation. The efficacy of the proposed method is verified by a simulation and an experiment.
Series This talk is part of the CUED Control Group Seminars series.
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Yoshito Ohta, Kyoto University
Tuesday 26 August 2014, 14:00-15:00