Abstract

An effective packet processing abstraction that leverages software or hardware acceleration techniques can simplify the implementation of high-performance virtual network functions. In this talk, we discuss the suitability of SDN switches’ stateful forwarding abstractions to model accelerated functions in both software and hardware accelerators, such as optimized software switches and FPGA -based NICs. In particular, we select an Extended Finite State Machine abstraction and discuss its suitability to provide the acceleration of functions such as stateful firewalls, load balancers and dynamic NATs. We further discuss the abstraction’s relevant design decisions, such as a flow-level programming consistency model, and how such decisions affect the ability to scale software implementations using multi-core processing.

Bio: Roberto Bifulco is a Senior Researcher of the NEC Laboratories Europe’s Network Division (Heidelberg, Germany). He holds a Ph.D. from University of Napoli “Federico II”, Italy. Before joining NEC , he worked as consultant for ICT start-ups and SMEs (Small and Medium Enterprises). His research activity focuses on the design of programmable networks, with main contributions in the fields of SDN scalability and security, high performance network function virtualization and related use cases.