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SUMMARY:Map-reduce as a Programming Model for Custom Computing Machines - 
 Philip Leong\, The Chinese University of Hong Kong
DTSTART:20080523T131500Z
DTEND:20080523T141500Z
UID:TALK12216@talks.cam.ac.uk
CONTACT:Prof Simon Moore
DESCRIPTION:The map-reduce model requires users to express their problem i
 n terms of a map function that processes single records in a stream\, and 
 a reduce function that merges all mapped outputs to produce a final result
 . By exposing structural similarity in this way\, a number of key issues a
 ssociated with the design of custom computing machines including paralleli
 sation\; design complexity\; software-hardware partitioning\; hardware-dep
 endency\, portability and scalability can be easily addressed. \n\nWe pres
 ent an implementation of a map-reduce library supporting parallel field pr
 ogrammable gate arrays (FPGAs)and graphics processing units (GPUs). Parall
 elisation due to pipelining\, multiple datapaths and concurrent execution 
 of FPGA/GPU hardware is automatically achieved. Users first specify the ma
 p and reduce steps for the problem in ANSI C and no knowledge of the under
 lying hardware or parallelisation is needed. The source code is then manua
 lly translated into a pipelined datapath which\, along with the map-reduce
  library\, is compiled into appropriate binary configurations for the proc
 essing units. We describe our experience in developing a number of benchma
 rk problems in signal processing\, Monte Carlo simulation and scientific c
 omputing as well as report on the  performance of FPGA\, GPU and heterogen
 eous systems.\n
LOCATION:SS03\, Computer Laboratory\, William Gates Building
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