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SUMMARY:Efficient FPGA Mapping of Gilbert's Algorithm for SVM Training on 
 Large-Scale Classification Problems - Markos Papadonikolakis (Imperial Col
 lege)
DTSTART:20080731T103000Z
DTEND:20080731T113000Z
UID:TALK12987@talks.cam.ac.uk
CONTACT:Dr George A Constantinides
DESCRIPTION:Support Vector Machines (SVMs) are an effective\, adaptable an
 d widely used method for supervised classification. However\, training an 
 SVM classifier on large-scale problems is proven to be a very time-consumi
 ng task for software implementations. This paper presents a scalable high 
 performance FPGA architecture of Gilbert’s Algorithm on SVM\, which maxi
 mally utilizes the features of an FPGA device to accelerate the SVM traini
 ng task for large-scale problems. Initial comparisons of the proposed arch
 itecture to the software approach of the algorithm show a speed-up\nfactor
  range of three orders of magnitude for the SVM training time\, regarding 
 a wide range of data’s characteristics.
LOCATION:Mahanakorn Laboratory\, EEE
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