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SUMMARY:Power and Fault Analysis Resistance in Hardware through Dynamic Re
 configuration - Benedikt Gierlichs\, Katholieke Universiteit Leuven - COSI
 C
DTSTART:20080905T150000Z
DTEND:20080905T153000Z
UID:TALK13229@talks.cam.ac.uk
CONTACT:Saar Drimer
DESCRIPTION:The purpose of my visit at the Computer Security Lab is to kic
 k off joint work with Saar Drimer.\n\nIn this talk (~20 minutes) I will in
 troduce the topic that we plan to work on.\n\nThe talk is based on this pa
 per:\n\nDynamically reconfigurable systems are known to have many advantag
 es such as area and power reduction. The drawbacks of these systems are th
 e reconfiguration delay and the overhead needed to provide reconfigurabili
 ty. We show that dynamic reconfiguration can also improve the resistance o
 f cryptographic systems against physical attacks.\nFirst\, we demonstrate 
 how dynamic reconfiguration can realize a range of countermeasures which a
 re standard for software implementations and that were practically not por
 table to hardware so far.\nSecond\, we introduce a new class of countermea
 sure that\, to the best of our knowledge\, has not been considered so far.
 \nThis type of countermeasure provides increased resistance\, in particula
 r against fault attacks\, by randomly changing the physical location of fu
 nctional blocks on the chip area at run-time.\nThird\, we show how fault d
 etection can be provided on certain devices with negligible area-overhead.
  The partial bitstreams can be read back from the reconfigurable areas and
  compared to a reference version at run-time and inside the device.\nFor e
 ach countermeasure\, we propose a prototype architecture and evaluate the 
 cost and security level it provides.\nAll proposed countermeasures do not 
 change the device's input-output behavior\, thus they are transparent to u
 pper-level protocols. Moreover\, they can be implemented jointly and compl
 emented by other countermeasures on algorithm-\, circuit-\, and gate-level
 .\n\nhttp://www.cosic.esat.kuleuven.be/publications/article-1128.pdf\n
LOCATION:Computer Laboratory\, William Gates Building\, Room FW11
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