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SUMMARY:Cadence Design Systems: Machine Learning in EDA - Andrew Hall
DTSTART:20210316T130500Z
DTEND:20210316T135500Z
UID:TALK155479@talks.cam.ac.uk
CONTACT:Ben Karniely
DESCRIPTION:Electronic Design Automation (EDA) tools enable development of
  next generation semiconductor devices. Through advances in manufacturing 
 techniques\, feature size has plummeted enabling logic density and design 
 complexity to rocket. Development machines have gone many-core and distrib
 uted processing has become commonplace\, yet many design optimization algo
 rithms are unable to scale to exploit the compute power available. A new a
 pproach to optimization is needed!\n\nIn this talk\, we will cover some of
  the history of EDA to provide an insight into the scope and scale of mode
 rn design optimization. We will learn how machine learning techniques can 
 be applied to some of the problems facing EDA\, and consider some of the d
 evelopments explored as part of our internship program at Cadence.\n\nBiog
 raphy: Andrew Hall gained his BSc Computer Science from UCL and has since 
 amassed more than 20 years of EDA experience. He has developed a simulated
  annealing placement engine and soft processors for Field Programmable Gat
 e Arrays (FPGAs) at Altera and is currently a software architect for high 
 performance and low power Clock Tree Synthesis (CTS) at Cadence Design Sys
 tems.
LOCATION:Online
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