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SUMMARY:Developments in VLSI design - Josh Pollick\, Churchill College
DTSTART:20210310T193000Z
DTEND:20210310T200000Z
UID:TALK158170@talks.cam.ac.uk
CONTACT:Matthew Ireland
DESCRIPTION:Traditionally\, if we wished to make a larger chip we would si
 mply create a bigger monolithic die. However\, with Moore's Law slowing an
 d poor yields on larger chips\, we must look to alternative solutions to c
 ontinue to economically scale our chips. As chips get larger and processes
  get smaller\, it also becomes much more difficult to create fast\, effici
 ent interconnects. This talk will introduce some techniques for building M
 ulti Chip Modules and 3D stacked chips. We will then discuss what benefits
  and drawbacks these techniques have\, and look at some real-world example
 s of them put into use.
LOCATION:Online\, via MS Teams
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