BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Talks.cam//talks.cam.ac.uk//
X-WR-CALNAME:Talks.cam
BEGIN:VEVENT
SUMMARY:Running dynamic algorithms on static hardware - Simon Peyton-Jones
  and Satnam Singh (Microsoft Research Cambridge)
DTSTART:20110217T160000Z
DTEND:20110217T170000Z
UID:TALK28875@talks.cam.ac.uk
CONTACT:Eiko Yoneki
DESCRIPTION:Hardware is good for expressing static algorithms\, where ther
 e is a fixed amount of computation to do (eg a 16-bit full adder).  Functi
 onal languages are good for parameterising static algorithms\; you write a
  function that runs at hardware-generation time\, to generate variants of 
 an algorithm (eg an N-bit full adder\, where N is specified at hardware ge
 neration time. \n\nBut what if you want to write a *recursive* function\, 
 or more generally an algorithm that unfolds in a data-dependent way?  (Fib
 onacci\, say.)  Moreover\, we'd like to process heap-allocated data.  No h
 ardware description language lets you do those two things conveniently.  B
 ut it would be great to do so\, because that would let us whip up Huffman 
 decoders\, graphics processing algorithms\, database filtering code\, and 
 so on\, and have it execute in FPGA hardware 10 mins later.\n\nIn this tal
 k we'll explain how to do this.  Of course\, the trick is to use a fixed b
 lob of hardware\, and re-use it repeatedly\, with an iteration counter or 
 stack to keep track of which instantiation of the function is running.  We
  compile a modest\, first-order functional language\, with full recursion\
 , and access to a heap.  We'll describe the architecture of our system\, a
 nd show you some running code.  \n\nSimon's web page: http://research.micr
 osoft.com/en-us/people/simonpj/\n\nSatnam's web page: http://research.micr
 osoft.com/en-us/people/satnams/\n
LOCATION:SS03 of the Computer Lab
END:VEVENT
END:VCALENDAR