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SUMMARY:Field programmable parallel computing in signal and image processi
 ng - is application development too hard and what can be done about it? - 
 David Kearney\, University of South Australia
DTSTART:20110421T131500Z
DTEND:20110421T141500Z
UID:TALK30841@talks.cam.ac.uk
CONTACT:Prof Simon Moore
DESCRIPTION:FPGAs once had a unique position in computing because they cou
 ld be massively parallel on a single chip. This unique parallel identity i
 s fading thanks to competition from GPUs and multi-core. The FPGA's unique
 ness now relies more on its customisable architecture\, direct high speed 
 I/O and perhaps lower power. \nSome argue that the extra development effor
 t required for custom architecture FPGA applications is too high to compet
 e in this new environment. They predict the demise of FPGAs in all but a n
 arrow niche unless something is done about the development process (Some a
 dvocate an open source FPGA as a motivator for faster adoption of new tool
 s).On the other hand those in the fixed architecture community are facing 
 a similar crisis as the reality of parallel application development emerge
 s. \nThis presentation describes research results that explore issues in t
 his controversy. The topics covered include:\n# rule based abstractions fo
 r hiding the complexity in synchronization in concurrent applications\, \n
 # the primacy of spatial abstractions in future parallel computing\, \n# p
 roposals to standardize application development on FPGAs for signal proces
 sing and image processing\n# a partial answer to the question: "What shoul
 d a "compiler" for FPGA based applications do?"\nand \n# the relationship 
 between hardware and software research in parallel computing for FPGAs and
  the search for better abstractions\n\n*About the presenter*\n\nDavid is A
 ssociate Professor of Computer Science at the University of South Australi
 a in Adelaide. He has published 108 refereed journal and conference papers
 \, been awarded more than $A1 million in competitive grants and has superv
 ised to graduation 12 higher degree by research students. He has previousl
 y worked on asynchronous architectures but in the last 15 years has concen
 trated in the area of reconfigurable computing with FPGAs. He is especiall
 y interested in languages and operating systems for reconfigurable computi
 ng in the domain of image and signal processing.\n
LOCATION:Lecture Theatre 2\, Computer Laboratory\, William Gates Building
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