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SUMMARY:Compile-time Instruction Scheduling for Modern ARM Processors - Lo
 w Level Design Enabling Performance In High Level Applications  - James Gr
 eenhalgh\, ARM
DTSTART:20141128T131500Z
DTEND:20141128T000000Z
UID:TALK56367@talks.cam.ac.uk
CONTACT:Jan Samols
DESCRIPTION:The vast majority of software is written at high levels of abs
 traction from the hardware. This talk will shed light on the translation l
 ayers and hardware design considerations that enable applications to run a
 t high performance on modern ARM processor designs.\n\nStatic Instruction 
 scheduling is a compiler optimisation developed in the 1980's to increase 
 processor resource usage in superscalar and pipelined processor designs. W
 hile many modern processors are out-of-order\, and therefore able to dynam
 ically schedule instructions\, ARM processor technology is used in a huge 
 number of markets\, each with unique design constraints. In this talk\, we
  will introduce and compare the top-level pipeline designs of contemporary
  ARM processors\, show where static instruction scheduling is beneficial\,
  and detail the algorithms used by the GCC and LLVM compilers to perform i
 nstruction\nscheduling.\n\nThis talk will also include a brief general int
 roduction to ARM\, and an opportunity for specific and general Q&A.\n
LOCATION:FW11\, Computer Laboratory
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