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SUMMARY:VISC: VIRTUAL INSTRUCTION SET COMPUTING - Vikram Adve\, University
  of Illinois at Urbana-Champaign
DTSTART:20150610T090000Z
DTEND:20150610T100000Z
UID:TALK59736@talks.cam.ac.uk
CONTACT:Microsoft Research Cambridge Talks Admins
DESCRIPTION:Although many systems use virtual instruction sets to improve 
 security\, portability and productivity\, two important classes of softwar
 e – high performance applications and security-sensitive systems softwar
 e – are almost universally compiled and shipped as native machine code. 
  In the VISC project\, we are exploring the security\, reliability\, and p
 erformance implications of shipping *all* such software in virtual instruc
 tion set form.  We use the LLVM virtual instruction set as the shipping re
 presentation of code to enable install-time and run-time compilation of al
 l such software.  For operating system security\, we have used the VISC ap
 proach to develop a system called Secure Virtual Architecture and shown th
 at SVA can be used to provide powerful and novel security guarantees for c
 ommodity operating systems such as Linux and FreeBSD.  For software reliab
 ility\, we have shown that we can locate the root causes of software failu
 res in large applications almost fully automatically: we are able to narro
 w down root causes to just a few (e.g.\, 2-14) program locations for a wid
 e range of bugs\, even in programs with hundreds of thousands of lines of 
 code.  We are currently exploring the performance benefits of VISC\, focus
 ing on heterogeneous mobile devices and on vector hardware.  In this talk\
 , I will briefly describe the VISC approach and summarize our results on t
 he security and reliability projects.  If time permits\, I will briefly in
 troduce the ongoing performance research.\n\nThe results on Secure Virtual
  Architecture are from joint work with John Criswell.  The results on soft
 ware fault diagnosis are from joint work with Swarup Sahoo.  The ongoing r
 esearch on performance optimizations is together with Prakalp Srivastava\,
  Maria Kotsifakou\, Joshua Cranmer and Will Dietz.  This research has been
  (or is presently) supported by the US National Science Foundation (NSF)\,
  the MURI Program of the Department of Defense (DoD)\, the Office of Naval
  Research (ONR)\, the Semiconductor Research Corporation (SRC) and the Def
 ense Advanced Research Projects Agency (DARPA).
LOCATION:Auditorium\, Microsoft Research Ltd\, 21 Station Road\, Cambridge
 \, CB1 2FB
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