BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Talks.cam//talks.cam.ac.uk//
X-WR-CALNAME:Talks.cam
BEGIN:VEVENT
SUMMARY:The CAVA Computer:  Exceptional Parallelism and Energy Efficiency 
 - Dr Peter Hsu
DTSTART:20150723T103000Z
DTEND:20150723T113000Z
UID:TALK60199@talks.cam.ac.uk
CONTACT:Prof Simon Moore
DESCRIPTION:Abstract:  Designing a new computer system is a very expensive
  proposition. But 80% of it is exactly the same as every other computer-yo
 u need caches\, multiprocessing\, coherency protocols\, memory systems\, e
 tc.  Getting all of that right requires skill and experience\, but is take
 n for granted and does not command much of a premium.  Getting it wrong\, 
 on the other hand\, is a commercial disaster.  In this talk I propose a re
 search initiative to standardize and open-source a design for the 80% that
  is the same in every design\, so that everyone can concentrate on adding 
 value to their own remaining 20%.  The CAVA computer is a "cluster in a ra
 ck" energy-efficient parallel computing architecture targeting 10nm CMOS t
 echnology.  The first part of the talk describes a 1024-node system where 
 each node consists of 96-core\, 3-issue out-of-order processor chips runni
 ng at 1GHz with four DDR4 memory channels.  Power estimates of different c
 omponents are discussed\, as well as cost projections.  The second part of
  the talk discusses architectural tradeoffs that were made\, how this arch
 itecture might play in the HPC exa-scale arena\, and broader market implic
 ations.  The talk concludes with how I envision the simulation infrastruct
 ure is organized\, what Oracle Labs brings to the table\, and a list of re
 search topics that I and others at Oracle Labs are actively researching an
 d would be interested in working with students at Universities.  I hope to
  organize an in-depth research effort into designing this computer and\, i
 f sufficient progress can be made\, perhaps building a prototype.\n\nBio: 
   Peter Hsu was born in Hong Kong and came to the United States at age 15.
   He received a B.S. degree from the University of Minnesota at Minneapoli
 s in 1979\, and the M.S. and Ph.D. degrees from the University of Illinois
  at Urbana-Champaign in 1983 and 1985\, respectively\, all in Computer Sci
 ence.  His first job was at IBM Research in Yorktown Heights from 1985-198
 7\, working on superscalar code generation with the 801 compiler team.  He
  then joined his ex-professor at Cydrome\, which developed an innovative V
 LIW computer.  In 1988 he moved to Sun Microsystems and tried to build a w
 ater-cooled gallium arsenide SPARC processor\, but the technology was not 
 sufficiently mature and the effort failed.  He joined Silicon Graphics in 
 1990 and designed the MIPS R8000 TFP microprocessor\, which shipped in the
  SGI Power Challenge systems in 1995.  He became a Director of Engineering
  until 1997\, then left to co-found his own startup\, ArtX\, best known fo
 r designing the Nintendo GameCube.  ArtX was acquired by ATI Technologies 
 in 2000\, which has since been acquired by AMD.  Peter left ArtX in 1999 a
 nd worked briefly at Toshiba America\, then became a visiting Industrial R
 esearcher at the University of Wisconsin at Madison in 2001.  He then cons
 ulted part time at various startups\, and attended the Art Academy Univers
 ity and the California College of the Arts in San Francisco where he learn
 ed to paint oil portraits\, and a Paul Mitchell school where he learned to
  cut and color hair.  In the late 2000's he consulted for Sun Labs\, which
  lead to discussions about the RAPID project post acquisition.  Peter join
 ed Oracle Labs as an Architect in 2011.\n
LOCATION:Lecture Theatre 2\, Computer Laboratory\, William Gates Building
END:VEVENT
END:VCALENDAR