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SUMMARY:Architectural Impacts of the Silicon Performance Wall - Dr Gavin S
 tark - Netronome and Visiting Industrial Fellow\, Computer Laboratory.
DTSTART:20161130T161500Z
DTEND:20161130T171500Z
UID:TALK67810@talks.cam.ac.uk
CONTACT:David Greaves
DESCRIPTION:Mainstream CPU clock speeds have barely increased in the past 
 ten or more years\, and the march of new process technologies has slowed -
  silicon is no longer getting faster automatically\, and the free lunches 
 that semiconductor engineers used to get thanks to manufacturing technolog
 y are not quite so free. This is not to say that nothing has changed for t
 he better as process technology has moved from 0.18um to 14nm - transistor
  budgets have gone up considerably\, to start with.\n\nThese issues have b
 een part of the reality underlying architecture and design decisions for s
 ilicon engineers. In this talk I will provide an insider's view into some 
 of these challenges\, and look at the evolution of architectural choices a
 cross a family of memory-centric processors built on leading edge Intel te
 chnology through the years.
LOCATION:Lecture Theatre 1\, Computer Laboratory
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