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SUMMARY:FPGA Implementations of High-bandwidth and Low-Latency Machine Lea
 rning based on Online Kernel Methods - Prof Philip Leong\, University of S
 ydney
DTSTART:20161128T150000Z
DTEND:20161128T163000Z
UID:TALK69291@talks.cam.ac.uk
CONTACT:Prof Simon Moore
DESCRIPTION:In machine learning\, traditional linear prediction techniques
  are well understood and methods for their efficient solution have been de
 veloped. Many real-world applications are better modelled using non-linear
  techniques\, which often have high computational requirements. Kernel met
 hods utilise linear methods in a non-linear feature space and combine the 
 advantages of both. They are considered one of the major recent advances i
 n machine learning research.\n\nCommonly used kernel methods include the s
 upport vector machine (SVM)\, Gaussian processes and regularisation networ
 ks. These are batch-based\, and a global optimisation is conducted over al
 l input exemplars to create a model. In contrast\, online methods\, such a
 s the kernel recursive least squares (KRLS) algorithm\, update the state i
 n a recursive and incremental fashion upon receiving a new exemplar. Altho
 ugh not as extensively studied as batch methods\, online approaches are ad
 vantageous when throughput and latency are critical.\nIn this talk I will 
 describe efforts in the Computer Engineering Laboratory to produce high-pe
 rformance implementations of online kernel methods. These have included: (
 1) a microcoded vector processor optimised for kernel methods\; (2) a full
 y pipelined implementation of kernel normalised least mean squares which a
 chieves 160 GFLOPS\; (3) an implementation of Naive Online regularised Ris
 k Minimization Algorithm (NORMA) which uses "braiding" to resolve data haz
 ards and reduce latency by an order of magnitude\; and (4) utilising rando
 m projections to make a low rank approximation to the input before process
 ing..\n \nBIOGRAPHY\nPhilip Leong received the B.Sc.\, B.E. and Ph.D. degr
 ees from the University of Sydney. In 1993 he was a consultant to ST Micro
 electronics in Milan\, Italy working on advanced flash memory-based integr
 ated circuit design. From 1997-2009 he was with the Chinese University of 
 Hong Kong. He is currently Professor of Computer Systems in the School of 
 Electrical and Information Engineering at the University of Sydney\, Visit
 ing Professor at Imperial College\, Visiting Professor at Harbin Institute
  of Technology\, and Chief Technology Advisor to Cluster Technology.
LOCATION:SS03\, Computer Laboratory\, William Gates Building
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