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SUMMARY:Some &quot\;Real World&quot\; Problems in the Analog and Mixed Sig
 nal Domains - Kevin Jones (Rambus)
DTSTART:20080226T130000Z
DTEND:20080226T140000Z
UID:TALK9886@talks.cam.ac.uk
CONTACT:Thomas Tuerk
DESCRIPTION:Speaker: Kevin Jones\n\nIn this talk\, we will discuss the des
 ign approaches commonly used for mixed mode systems. We will present a syn
 opsis of the way such systems are currently verified in industry and talk 
 about some of the drawbacks of these approaches. We will give a collection
  of interesting "real world" examples - examples drawn from actual failure
 s of real designs but reduced to their essential elements to make them of 
 a suitable size for academic study - and show some of the key concerns ana
 log/mixed mode designers have in practice. We will present digital\, analo
 g and mixed mode examples. Finally\, to seed what we hope will be an on-go
 ing discussion\, we will illustrate some of the novel approaches we are de
 veloping to these issues\, particularly in the analog domain.\n\n\n\nAbout
  Dr. Kevin Jones:\n\nDr. Kevin D. Jones is an Engineering Director at Ramb
 us Inc\, Los Altos\, CA. He holds a Ph.D. in Computing Science from the Un
 iversity of Manchester\, a M.Sc. in Computation from Oxford University and
  a B.Sc. in Computer Science from the University of Reading.\n\nDr. Jones'
 s areas of interest cover practical and theoretical approaches to design a
 nd verification of digital and analog circuits and systems. Prior to joini
 ng Rambus\, he was a member of Research Staff at DEC's System Research Cen
 ter\, working in the area of formal methods.\nPreviously\, he had been a m
 ember of both academic and industrial research groups in the UK\, working 
 in the areas of formal specification and verification. For the last 14 yea
 rs at Rambus\, he has been working on\, and leading groups working on\, pr
 actical verification for high speed digital/analog designs. He is currentl
 y leading a technology development team focusing on novel design and verif
 ication tools and methods for this class of designs.
LOCATION:Computer Laboratory\, William Gates Building\, Room SS03
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