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Matt Lee, XJTAG
Thursday 03 April 2008, 19:00-20:30
Boundary Scan. From Connection Testing to On-silicon Toolkits
- đ¤ Speaker: Matt Lee, XJTAG
- đ Date & Time: Thursday 03 April 2008, 19:00 - 20:30
- đ Venue: Lecture Theatre 1, Cambridge University Computer Laboratory, J J Thompson Avenue, Madingley Road, Cambridge
Abstract
Boundary scan based on the JTAG 1149 .1 IEEE standard has been around a long time – so have test engineers. Following the usual pressures to shrink, further integrate and ‘make re-programmable’ new designs; we are now seeing a renewed interest in test using JTAG .
XJTAG , Matt Lee’s company, has added a suite of test tools on top of the 1149.1 standard. These are based around a high-level language, XJEASE . It is this ‘language’ which has proved invaluable for reasons you probably will not guess. This talk will explain how JTAG Boundary Scan works and you’ll see some examples of it in action from its basic use to advanced on-silicon diagnosis.
Series This talk is part of the IET Cambridge Network - Lectures series.
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