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Wirelength Modeling for Homogeneous and Heterogeneous FPGA Architectural Development

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If you have a question about this talk, please contact Dr George A Constantinides .

This talk will detail the work that I undertook during my post-doctoral fellowship at The University of British Columbia. During my time there I was involved in developing models that describe FPGA architectures. This talk will detail these models and how they can be used to predict wirelength requirements, both in terms of the circuits mapped to FPG As and how this in turn affects the requirements of the FPGA architecture.

This talk is part of the CAS FPGA Talks series.

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