(FPT Preview) Modelling and Compensating for Clock Skew Variability in FPGAs
- π€ Speaker: Dr Pete Sedcole (Imperial College London)
- π Date & Time: Friday 28 November 2008, 15:30 - 16:00
- π Venue: Mahanakorn Laboratory, EEE
Questions? Contact
Alastair Smith
Abstract
Abstract not available
Series This talk is part of the CAS FPGA Talks series.
Included in Lists
Note: Ex-directory lists are not shown.
![[Talks.cam]](/static/images/talkslogosmall.gif)


Friday 28 November 2008, 15:30-16:00