University of Cambridge > Talks.cam > Churchill CompSci Talks > Developments in VLSI design

  Browse A-Z

Log in

Googledetails Microsoftdetails

🔐 Log In

Information on

Subscribing to talksdetails Finding a talkdetails Adding a talkdetails Disseminating talksdetails Help and Documentationdetails

ℹ️ Information

Developments in VLSI design

Download to your calendar using vCal

If you have a question about this talk, please contact Matthew Ireland .

Traditionally, if we wished to make a larger chip we would simply create a bigger monolithic die. However, with Moore’s Law slowing and poor yields on larger chips, we must look to alternative solutions to continue to economically scale our chips. As chips get larger and processes get smaller, it also becomes much more difficult to create fast, efficient interconnects. This talk will introduce some techniques for building Multi Chip Modules and 3D stacked chips. We will then discuss what benefits and drawbacks these techniques have, and look at some real-world examples of them put into use.

This talk is part of the Churchill CompSci Talks series.

This talk is included in these lists:

Note that ex-directory lists are not shown.

Other lists

imagine2027 Helmore 201 (Anglia Ruskin University, Cambridge Campus) Faculty of Law, 10 West Road, Cambridge, CB3 9DZ

Other talks

Afternoon Break Quantifying the unquantifiable? Assessing the importance of almsgiving in early modern France and Spain Cooperation for Nature Director's Briefing When Programmes Disagree About Programmes: Code Poetry and the Problem of Programme–Programme Communication Title to be confirmed
 

© 2006-2025 Talks.cam, University of Cambridge. Contact Us | Help and Documentation | Privacy and Publicity