Designing Languages to Aid Verification
- đ¤ Speaker: David Pearce (Victoria University of Wellington)
- đ Date & Time: Friday 27 February 2009, 15:15 - 16:15
- đ Venue: GS15, Computer Laboratory
Abstract
Automated Software Verification has received considerable attention over the years, with numerous success stories. However, software written in mainstream programming languages is not routinely verified. While some progress has been made on tools for this purpose—most notably ESC /Java and Spec#—they have not seen widespread use. The problem is that mainstream languages are simply not suited to verification. In this talk, I want to examine why this is. In particular, to consider what languages constructs are problematic, and how we might modify them to reduce these effects. The goal is to find small changes to existing languages which offer big improvements.
Series This talk is part of the Computer Laboratory Programming Research Group Seminar series.
Included in Lists
- All Talks (aka the CURE list)
- bld31
- Cambridge talks
- Computer Laboratory Programming Research Group Seminar
- Department of Computer Science and Technology talks and seminars
- GS15, Computer Laboratory
- Interested Talks
- School of Technology
- Trust & Technology Initiative - interesting events
- yk449
Note: Ex-directory lists are not shown.
![[Talks.cam]](/static/images/talkslogosmall.gif)

David Pearce (Victoria University of Wellington)
Friday 27 February 2009, 15:15-16:15