Abstract

Most modern integrated circuits perform computations efficiently using synchronous (clocked) pipelines. These give a high throughput by exploiting parallelism. The synchronous framework gives desirable design semantics in most cases, but has some inconvenient properties which make some problems difficult to solve, and occasionally this results in an overly complicated control logic. A good example is a FIFO between two different clock domains.

This talk explores the asynchronous computation framework, from the basic ideas through transistor-level implementations of basic control structures to complex control blocks, that make for extremely easy-to-read circuit diagrams resembling flowcharts. We will also discuss the main trade-offs involved in asynchronous circuit design.